Long-Dimm
DDR400 512MB PC3200 CL=3
- 184pin DDR Synchronous Un-buffered
- 512MB TSOP DRAM 64Mx8-bit with 8pcs
- Memory Clock, Speed 5ns (400MHz)
- 6 Layers PCB
- CL= 3-3-3-8
- SSTL 2.5V (+/-0.1V)
|
Description
184pin DDR Synchronous Un-buffered
512MB TSOP DRAM 64Mx8-bit with 8pcs
Memory Clock, Speed 5ns (400MHz)
6 Layers PCB
CL= 3-3-3-8
SSTL 2.5V (+/-0.1V)
| FUNCTION DESCRIBED |
SPD |
FUNCTION SUPPORT |
| Number of physical ranks on this DDR SDRAM module |
01 |
1 rank |
| Module Data Width |
40 |
64bits |
| DDR SDRAM Device Cycle Time tCK (highest CAS latency CL = 2.5 |
50 |
5ns |
| DDR SDRAM Device Access from Clock tAC (highest CAS latency CL = 2.5) |
65 |
+/-0.65ns |
| Refresh Rate/Type |
82 |
7.8us & Self refresh |
| Minimum Clock Delay Back to Back Random Column Address tCCD |
01 |
1 clock cycle |
| Burst Lengths Supported (1, 2, and 8) |
0E |
2,4,8 |
| CAS# Latencies Supported (CL = 2.5 and 3) |
18 |
3,3 |
| CS Latency (CS latency = 0) |
01 |
0 tCK |
| WE# Latency (WE# latency = 1) |
02 |
1 clock cycle |
| DDR SDRAM Device Cycle Time tCK at 2nd highest CAS latency (CL = 2) |
60 |
6.0ns |
| DDR SDRAM Device Access from Clock tAC at 2nd highest CAS latency (CL = 2) |
70 |
+/-0.70ns |
| DDR SDRAM Device Minimum Row Precharge Time tRP |
3C |
15ns |
| DDR SDRAM Device Minimum Row Active to Row Active tRRD |
28 |
10ns |
| DDR SDRAM Device Minimum RAS# to CAS# Delay tRCD |
3C |
15ns |
| DDR SDRAM Device Minimum RAS# Pulse Width tRAS |
28 |
40ns |
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