All stock codes associated to this product
HX318C10FWK2/8, 740617230680
HX318C10FWK2/8
8GB (4GB 512M x 64-Bit x 2 pcs.)
DDR3-1866 CL10 240-Pin DIMM Kit
DESCRIPTION
HyperX HX318C10FWK2/8 is a kit of two 512M x 64-bit (4GB) DDR3-1866 CL10 SDRAM (Synchronous DRAM) 1Rx8 memory modules, based on eight 512M x 8-bit DDR3 FBGA components per module. Total kit capacity is 8GB. Each module kit has been tested to run at DDR3-1866 at a low latency timing of 10-11-10 at 1.5V. Additional timing parameters are shown in the PnP Timing Parameters section below. The JEDEC stan-dard electrical and mechanical specifications are as follows:
PnP JEDEC TIMING PARAMETERS:
DDR3-1866 CL10-11-10 @1.5V
DDR3-1600 CL9-10-9 @1.5V
DDR3-1333 CL8-9-8 @1.5V
FEATURES
- JEDEC standard 1.5V (1.425V ~1.575V) Power Supply
- VDDQ = 1.5V (1.425V ~ 1.575V)
- 933MHz fCK for 1866Mb/sec/pin
- 8 independent internal bank
- Programmable CAS Latency: 13, 11, 10, 9, 8, 7, 6
- Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
- 8-bit pre-fetch
- Burst Length: 8 (Interleave without any limit, sequential with starting address 000 only), 4 with tCCD = 4 which does not allow seamless read or write [either on the fly using A12 or MRS]
- Bi-directional Differential Data Strobe
- Internal(self) calibration : Internal self calibration through ZQ pin (RZQ : 240 ohm 1%)
- On Die Termination using ODT pin
- Average Refresh Period 7.8us at lower than TCASE 85C, 3.9us at 85C < TCASE < 95C
- Asynchronous Reset
- PCB : Height 1.180 (30.00mm), single sided component
SPECIFICATIONS
- CL(IDD) 10 cycles
- Row Cycle Time (tRCmin) 44.75ns (min.)
- Refresh to Active/Refresh 260ns (min.)
- Command Time (tRFCmin)
- Row Active Time (tRASmin) 32.125ns (min.)
- Maximum Operating Power TBD W* (per module)
- UL Rating 94 V - 0
- Operating Temperature 0oC to 85oC
- Storage Temperature -55oC to +100oC
- Power will vary depending on the SDRAM used.
